Question: CacheAware Code Rewrite the following C code to take advantage of locality for the L1 cache on an Intel i7 chip. The L1 cache is

CacheAware Code Rewrite the following C code to take advantage of locality for the L1 cache on an Intel i7 chip. The L1 cache is 32 kilobytes, 8-way set associative, and has a 64-byte block size. int SIZE100000 void data_processing(int ** data) // *Modify Code Below * int i 0; int j 0; for (i-0; i
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