Can anyone please help me solve these microinstruction problems? The first two screenshots are of the two examples we were provided. The third screenshot has the problems on them. Any help in understanding this is greatly appreciated!

Question:

A bus B bus C bus PC AC Example Microinstruction :: SP The microinstruction layout for controling the date path of Fit PC := PC + 1 AMASK SMASK 00 0 00 0 0 01 0 6 0 A latch B latch Address out To address bus MAR Data in To data bus MBR M1 AMUX ALU Shifter Data out Fig. 4 The dam path of the example mir urchiocare A bus B bus C bus PC AC Example Microinstruction :: SP The microinstruction layout for controling the date path of Fit PC := PC + 1 AMASK SMASK 00 0 00 0 0 01 0 6 0 A latch B latch Address out To address bus MAR Data in To data bus MBR M1 AMUX ALU Shifter Data out Fig. 4 The dam path of the example mir urchiocare