Can someone give the correct and complete answer, not just copy others answer and forward it...thank you

2. Suppose a typical program has an instruction mix of 40%, 15%, 20%, and 25% for instruction types A, B, C, and D respectively. On processor P1, the CPIs for these instruction types are 1, 2, 3, and4 respectively, and the clock rate is 2GHz. One representative program, S, executes 1 llion instructions (a) What is Pl's throughput? Don't forget that the unit of throughput in this context) is MIPS (b) How long does S take to run on P1? (c) A compiler has options that allow it to generate 2 instructions of type A instead of 1 instruction of type C. How much faster can you make a typical program run? (d) The VLSI designers tel you that they can improve the clock rate to 3GHz. However, due to the need to handle the extra power dissipation, a cooling system that adds 30% to the cost of the package is needed. Assuming you want to maximize the performance/cost ratio, what do you tell them to do? (e) Processor P2 has the same ISA but neds 2 CPI for a nstruction types. What clock rate would P2 need to have the same performance as P1? (f) An I/O operation of b bytes takes 3b+5 ,s. Progran S, is like S but must also do k bytes of I/O, though the I/O may be split into any number of transfers (e.g.,k transfers of 1 byte each, k/2 transfers of 2 bytes each, 1 k-byte transfer) The system designers would prefer to do multiple small transfers to avoid hogging the I/O bus. There is also a requirement that S' takes at most 3 times as long to run as S. How best do you split the I/O while keeping system designers happy? You may assume that k is large enough to avoid using floor and ceiling functions (as an approximation), and ranges over values for which your result makes sense