Can someone please solve this problem? thanks in advance

MIPS is a 32-bit ISA. The I instructions in MIPS have the following format: (1) Assume that we want to implement a single-cycle datapath for I MIPS instructions, write down the "in" ports part of the VHDL entity declaration for the single-cycle datapath controller. entity singlecyclecontroller is port (???: in STD_LOGIC); end foo; (2) Now assume that we want to implement a multi-cycle datapath, Write down the "in" ports part of the VHDL entity declaration for the multi-cycle datapath controller. (3) Now assume that we want to implement a pipelined datapath with no data forwarding, Write down the "in" ports part of the VHDL entity declaration for the pipelined datapath controller