can you help me with this problem? Problem $2($Data Hazards, Chapter $4)$

This exercise examines the relationship among data forwarding, hazard detection, and ISA design. It uses the following instruction sequence and assumes that it is executed on a $5-$stage pipeline data path as described in Chapter $4.$ Register writes are done in the first half, and register reads in the second half of the WB stage.

$```$

lw r$2,20($r$4)$

add r$4,$ r$2,$ r$1$

$1$w r$3,0($r$4)$

sub r$1,$ r$3,$ r$2$

sw r$4,40($r$5)$

$```$

A$.$ If there is no hardware data forwarding and hazard detection support, please insert nops to ensure correct execution of the code sequence above, and show your revised code sequence.

B$.$ Assume we can rearrange the code to reduce the number of nops needed. Please show your improved code sequence with minimal number of nops needed.

C$.$ Assume there are data forwarding and hazard detection. For the optimized code in $($B$),$ in each cycle, please show which signals are asserted $($and their values$)$ by the hazard detection unit and the data forwarding unit in Figure $4\mathrm{.}60($in textbook$)$ shown below. The signals relevant here are PCWrite, IF$/$IDWrite and ID$/$EXZero $($which controls the MUX connected to the output of the control unit$)$ from the hazard detection unit; and ALUSel$1$ and ALUSel$2$ to those two input MUXes to ALU from the forwarding unit. The three possible values for ALUSel$1$ and ALUSel$2$ are: $0($no forwarding$),1($forward ALU output from previous instruction$),$ or $2($forward data value from the second$-$previous instruction$).$ You only need to show the first $7$ cycles in the following table.