Chapter $5$:

$1,2,7,13,14*.$

$*$Clarification for #$14$: Assume W$,$ X$,$ Y$,$ and Z are attached to Input I$0,$ I$1,$ I$2,$ I$3,$ respectively and

assume that A and B are attached to S$1$ and S$2$ respectively and that the same notation is used as is used in

class.

Problem A$2$: Using the $4-$Bit $2$s complement adder$/$subtracter with overflow detect designed in class,

show the design of an $8-$bit $2$s complement adder$/$subtracter with overflow detect.

Problem B: Design a combinational logic circuit that adds $3$ bits, X$,$Y$,$ & Z and a carry in$,$ Cin, to

produce a $3-$bit sum, S$2,$ S$1,$ S$0.$ Assume you have all variables and their complements available.

Problem C: Show the design of a $2-1$ Mux: $($a$)$ using a NAND$/$NAND implementation, $($b$)$ using a

NOR$/$NOR implementation. Which would you prefer to build and why? Assume that you have all

variables and their complements available.

Problem D: Show the design of an $8-1$ mux using only $2-1$ muxes. Remember to label the address lines

and input such that the subscript of the input selected is the decimal equivalent of the applied binary

address that selects that input. Label your address line, from most to least significant, respectively, S$2$Chapter $5$:

$1,2,7,13,14*.$

$*$Clarification for #$14$: Assume W$,$ X$,$ Y$,$ and Z are attached to Input I$0,$ I$1,$ I$2,$ I$3,$ respectively and

assume that A and B are attached to S$1$ and S$2$ respectively and that the same notation is used as is used in

class.

Problem A$2$: Using the $4-$Bit $2$s complement adder$/$subtracter with overflow detect designed in class,

show the design of an $8-$bit $2$s complement adder$/$subtracter with overflow detect.

Problem B: Design a combinational logic circuit that adds $3$ bits, X$,$Y$,$ & Z and a carry in$,$ Cin, to

produce a $3-$bit sum, S$2,$ S$1,$ S$0.$ Assume you have all variables and their complements available.

Problem C: Show the design of a $2-1$ Mux: $($a$)$ using a NAND$/$NAND implementation, $($b$)$ using a

NOR$/$NOR implementation. Which would you prefer to build and why? Assume that you have all

variables and their complements available.

Problem D: Show the design of an $8-1$ mux using only $2-1$ muxes. Remember to label the address lines

and input such that the subscript of the input selected is the decimal equivalent of the applied binary

address that selects that input. Label your address line, from most to least significant, respectively, S$2$