Complete the following table for the given systems. Redraw the table onto your answer sheet; show all work and your reasoning below the table. Indicate which system is the fastest in terms of program completion time. Assume that execution is sequential and there is no branching in the programs being run. Also assume that an instruction is issued so as to maximize the resource utilization in the pipelined systems below

System Description Cycle Time Clock Instruction Processor Frequency Completion Time Bandwidth 5-stage pipeline, processor bandwidth 250 MIPS. 5-stage pipeline, cycle time 5 ns B D No pipeline; instruction latency 25 ns, cycle time 5 ns Pipelined design, instruction completion time 10 ns, clock frequency 1 GHz. 6-stage pipeline, instruction completion time 36 ns No pipeline; instruction completion time 15 ns, clock frequency 666.6 MHz. E F