Question: Computer architecture question 4. Given below is the MIPS instruction set for the R and I format along with examples of some operations. The function

Computer architecture questionComputer architecture question 4. Given below is the MIPS instruction set for

4. Given below is the MIPS instruction set for the R and I format along with examples of some operations. The function and opcodes are given in hexadecimal system InstFormat op (6 bits) rs (5 bits) rt (5 bits) rd (5 bits) shamt (5 bits) funct (6 bits) add sub 0 regl regl reg3 reg3 reg2 0 20 re Inst Format |op (6 bits) rs (5 bits) addi regl regl regl regl regl constant constant constant constant constant constant 23 2b SW Inst Format constant address Jump Table 1: MIPS Instruction Set Using this table answer the following questions (a) Consider the following C statements. Each is a separate statement. Registers for variables s0 to s7 map to numbers 16 to 23 (given in decimal system) and temporary registers t0 to t7 map to 8 to 15. Give the MIPS assembly code and the hexadecimal instruction for the codes (4*(5+5)-40) i. f-(g-h)+(i-j) iii. if(i--j) (f-g+h] iv. while(ik+1) (b) The following binary numbers represent certain instructions. Assuming we are using the MIPS instruction set, give the pseudocode, in a C-like format, for each instruction (3*5-15) i. 0000 0010 0001 0000 1000 0000 0010 0000 ii. 1000 1110 0101 0001 0000 0100 1011 0000 iii. 0001 0010 0101 0001 0000 0100 1011 0000 4. Given below is the MIPS instruction set for the R and I format along with examples of some operations. The function and opcodes are given in hexadecimal system InstFormat op (6 bits) rs (5 bits) rt (5 bits) rd (5 bits) shamt (5 bits) funct (6 bits) add sub 0 regl regl reg3 reg3 reg2 0 20 re Inst Format |op (6 bits) rs (5 bits) addi regl regl regl regl regl constant constant constant constant constant constant 23 2b SW Inst Format constant address Jump Table 1: MIPS Instruction Set Using this table answer the following questions (a) Consider the following C statements. Each is a separate statement. Registers for variables s0 to s7 map to numbers 16 to 23 (given in decimal system) and temporary registers t0 to t7 map to 8 to 15. Give the MIPS assembly code and the hexadecimal instruction for the codes (4*(5+5)-40) i. f-(g-h)+(i-j) iii. if(i--j) (f-g+h] iv. while(ik+1) (b) The following binary numbers represent certain instructions. Assuming we are using the MIPS instruction set, give the pseudocode, in a C-like format, for each instruction (3*5-15) i. 0000 0010 0001 0000 1000 0000 0010 0000 ii. 1000 1110 0101 0001 0000 0100 1011 0000 iii. 0001 0010 0101 0001 0000 0100 1011 0000

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