Computer Architecture question:

This problem deals with the following code fragment, as it executes. Note that the register naming convention is taken from the RISC-V ISA manual, page 109 addi s2, zero, 100 add s3, zero, zero add s4, zero, zero LOOP: slli t, s3, 3 add t, t1, a2 ld t3, 0(t1) srai t3, t3, 2 andi t2, s3, 1 beq zero, t2, LABEL sub t2, zero, // a2 contains the base address of array1X t2 LABEL add s4, t2, s4 add s3, s3, 1 blt s3, s2, L00P sd S4, 1600 (a2) (a) What is the C code that this fragment implements? Include any correspondence between variable names and registers, if necessary. Temporary registers need not have corresponding variables, but they may if it'll make your code easier to read. (b) Draw the pipeline diagram for the loop iteration (not the part before LOOP) where the loop variable's value is 33. Include the slli instruction from the next iteration of the loop as well, so that you capture all of the stalls in one iteration. Assume no forwarding (c) How many pipeline stalls are there? What is the total execution time (in cycles) for this iteration? (d) If the loop variable's value is 34, how does the execution time of the loop change? No need to redraw the entire pipeline diagram, but you may find it useful to redraw a few instructions' worth. (e) Can you reorder the instructions to reduce the number of stalls? Again, there's no forwarding. You may use different registers if it helps. This problem deals with the following code fragment, as it executes. Note that the register naming convention is taken from the RISC-V ISA manual, page 109 addi s2, zero, 100 add s3, zero, zero add s4, zero, zero LOOP: slli t, s3, 3 add t, t1, a2 ld t3, 0(t1) srai t3, t3, 2 andi t2, s3, 1 beq zero, t2, LABEL sub t2, zero, // a2 contains the base address of array1X t2 LABEL add s4, t2, s4 add s3, s3, 1 blt s3, s2, L00P sd S4, 1600 (a2) (a) What is the C code that this fragment implements? Include any correspondence between variable names and registers, if necessary. Temporary registers need not have corresponding variables, but they may if it'll make your code easier to read. (b) Draw the pipeline diagram for the loop iteration (not the part before LOOP) where the loop variable's value is 33. Include the slli instruction from the next iteration of the loop as well, so that you capture all of the stalls in one iteration. Assume no forwarding (c) How many pipeline stalls are there? What is the total execution time (in cycles) for this iteration? (d) If the loop variable's value is 34, how does the execution time of the loop change? No need to redraw the entire pipeline diagram, but you may find it useful to redraw a few instructions' worth. (e) Can you reorder the instructions to reduce the number of stalls? Again, there's no forwarding. You may use different registers if it helps