COMPUTER ENGINEERING

Using Verilog

The code I have so far

8-bit counter which performs up-counting and down-counting operations based on the inputs enable, updn and load value The functions of various inputs of the counter are as follows: load: when the load button is pressed, you can load any input value from 00 to FF enable: the counter is functional only when the enable bit is high updn: when updn = 1, count up, when updn = 0, count down o o