Computer Organization and Embedded Systems (6th Edition)

chapter 9

[M] Tree reduction of summands using 3-2 and 4-2 reducers was described in Sections 9.5.3 and 9.5.4. It is also possible to perform 7-3 reductions on each reduction level. When only three summands remain, a 3-2 reduction is performed, followed by addition of the final two summands. (a) How many 7-3 reduction levels are needed to reduce 32 summands to three? Compare this to the seven levels needed to reduce 32 summands to three when using 3-2 reductions. (b) Example 9.3 in Section 9.10 shows that log2k 1 levels of 4-2 reduction are needed to reduce k summands to 2 in a reduction tree. How many levels of 7-3 reduction are needed to reduce k summands to 3?

9.18 [M] Show how to implement a 4-2 reducer by using two 3-2 reducers. The truth table for this implementation is different from that shown in Figure 9.21.

9.19 [E] Using manual methods, perform the operations A B and A B on the 5-bit unsigned numbers A = 10101 and B = 00101.

9.20 [M] Show how the multiplication and division operations in Problem 9.19 would be performed by the hardware in Figures 9.7a and 9.23, respectively, by constructing charts similar to those in Figures 9.7b and 9.25.

9.23 [M] How does the excess-x representation for exponents of the scale factor in the floatingpoint number representation of Figure 9.26a facilitate the comparison of the relative sizes of two floating-point numbers? (Hint: Assume that a combinational logic network that compares the relative sizes of two, 32-bit, unsigned integers is available. Use this network, along with external logic gates, as necessary, to design the required network for the comparison of floating-point numbers.

Can you plaese give me an answer?