Consider $6-$bit address space for this question. The following series of physical address references for LOAD operations are given as byte addresses:

$20,5,18,4,37,4,36,21$

Assume caches are initially empty. Label each reference in the list as a hit or a miss and show the final contents of the cache for the following configurations:

a$)$ A $16-$Byte direct$-$mapped cache with $4-$Byte blocks.

b$)$ A $16-$Byte $2-$way set associative cache with $2-$Byte blocks.

c$)$ A $16-$Byte fully associative cache with $8-$Byte blocks.

$\backslash$table$[[$Address$,$Byte$0,$Byte$1,$Byte$2,$Byte$3,$Byte$4,$Byte$5,$Byte$6,$Byte$7],[0,5,6,7,8,9,10,15,20$