Consider a direct-mapped data cache design in which a 32-bit address is divided into these three fields: 20-bit tag, 9-bit index, and 3-bit offset.

How large is a line in number of bytes?

How many lines are in the cache?

How large is the cache in number of bytes?

For the following segment of code written in C, where "sum" and the array "a" are typed as 4-byte integers, what is the miss rate?

(Assume the variable "sum" and the loop index "i" are register-allocated by the compiler within the body of the loop and thus do not cause data cache accesses within the loop.)

for(i=0;i<4096;i++){

sum = sum + a[i];

}