Question: Consider a finite state machine constructed with 7 4 LSxx combinational logic, having a t pd of 3 0 ns and 7 4 LS 7

Consider a finite state machine constructed with 74LSxx combinational logic, having a t pd of 30
ns and 74LS74 flip-flops having a ts of 20 ns. If you expect 104 asynchronous inputs per second,
calculate the expected MTBF for this system using the synchronizer above if it is clocked at 5
MHz.
a. Calculate tr=tclkts tpd :
b. Calculate MTBF and show your work.

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