Consider a simple in-order processor with the following characteristics:

An instruction can issue if all of its dependencies are satisfied

Consists of a pipeline where one instruction is issued at each cycle if possible.

There is no limit to the number of functional units.

Given the following sequential list of instructions and instruction latencies::

A. sub $r2 = $r1, $r4

B. store 4[$r3] = $r2

C. load $r7 = 8[$r5]

D. add $r9 = $r7, 20

Instruction Latency

add 2

sub 2

load 3

store 2

I. What is the CPI of the code if executed sequentially with no data speculation?

II. Describe how even with no prior knowledge about the two memory accesses, we can use data speculation and instruction scheduling to improve the ILP of the program?

A. Write out the new schedule and calculate the new CPI (assuming that the two locations did not collide and the data speculation has no overhead)?