Question: Consider a simple paging scheme with pages (and frames in main memory) of size 10. Process PI has a logical address space of size 40,

Consider a simple paging scheme with pages (and frames in main

Consider a simple paging scheme with pages (and frames in main memory) of size 10. Process PI has a logical address space of size 40, starting at address 0. Main memory also starts at address 0. PI uses the page table shown below: (a) What absolute addresses would be accessed by the following stream of logical addresses? 0, 5, 10, 32, 29 (b) How could the page table be modified to prevent P1 asking for an address greater than 39

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