Consider an ARM CPU that executes its instructions using a simple 3-stage pipeline consisting of fetch, decode, and execute stages. Show how the instructions in the following ARM code would pass through the pipeline by copying and completing the table below for the first nine cycles only. The first three lines have been completed for you. You should highlight in your table where any structural hazards and control hazards occur. ; printString routine ; Input: RO address of string to print printString printLoop printCond MOV R1, RO B print Cond SWI 0 LDRB RO, [R1], #1 CMP RO, #0 BNE printLoop MOV PC, R14 Cycle Decode Execute Fetch MOV R1,RO B printCond SWI 0 MOV R1, RO B printCond MOV R1, RO 2 3 4 5 6 7 8 9