Consider following program in main memory, to be executed on a MIPS architecture (assume memory address 1 value is 7 and memory address 12 value is 6) R1 leftarrow [18] R2 leftarrow [3] R3 leftarrow [6] R1 leftarrow R1 + 2 R4 leftarrow [1] R4 leftarrow [12] [8] leftarrow R1 R1 leftarrow [1] BNE R1, R4, Label//branch on not equal R1 leftarrow [7] R1 leftarrow [R3] R3 leftarrow [1] R1 leftarrow [15] R4 leftarrow [5] [6] leftarrow R1 R1 leftarrow [0] [19] leftarrow R1 Label 1: R1 leftarrow [1] R1 leftarrow [6] R3 leftarrow [10] R1 leftarrow [15] [25] leftarrow R1 R1 leftarrow [16] Provide total number memory access for above execution Provide total data memory access for above execution Provide count of each type of instruction