Consider the code shown below; this code multiplies two polynomials of order 4 i.e.

each polynomial has 5 coefficients. Design a single-purpose processor for this code;

your solution should provide a complete design of the processors datapath. Your implementation should use a minimal number of adders and multipliers. then implement the processor datapath using

VHDL under Quartus.

int i, j;

int A[5], B[5], C[9];

while(1)

{

while(!go_i);

A[0] = A0_in;

A[1] = A1_in;

A[2] = A2_in;

A[3] = A3_in;

A[4] = A4_in;

B[0] = B0_in;

B[1] = B1_in;

B[2] = B2_in;

B[3] = B3_in;

B[4] = B4_in;

for(i=0; i<9; i++)

{

C[i]=0;

}

for(i=0; i<5; i++)

{

for (j=0; j<5; j++)

{

C[i+j] += A[i]*B[j];

}

}

}