Consider the following register transfer description algorithm

Declare Registers: A$[8],$ B$[8],$ C$[8]$;

START:

Alarr$0$;

Blarr$00001010$;

AlarrA$+B$;

BlarrB$-1$;

$IfB<mn>0</mn>$ then $goto$ LOOP;

ClarrA;

LOOP: $,$AlarrA$+B$;

HALT: Go to HALT

A$.$ Design the processing section for implementing the above algorithm identifying all the control points.

B$.$ Draw a neat state diagram. Write the operations performed and the control signals to be activated in

each state

C$.$ Design controller using decoder, counter and sequence controller and draw the diagram

D$.$ Draw the PLA diagram for implementing the sequence controller

D$.$ Design a Modern Microprogrammed control unit and give the binary listing of the microprogram