Consider the following sequential program that should be implemented as a hardware component.

input$\frac{s}{o}$utputs: $u,w,y,dx,i$

temporary variables: $u1,u2,u3,u4,u5,u6,y1$

$u1=u**dx$;

$u2=5**w$;

$u3=3**y$;

$y1=i**dx$;

$w=w+dx$;

$u4=u1**u2$;

$u5=dx**u3$;

$y=y+y1$;

$u6=u-u4$;

$u=u6-u5$;

Assume each multiplication takes $4$ clock cycles and each addition or subtraction takes $1$ clock cycle. Compute the ASAP schedule to determine the minimum execution time. Compute the ALAP schedule based on the minimum execution time.

Assume there are one $2-$input multiplier, which is pipelined into $4$ stages, and one $2-$input adder$/$subtractor$,$ which is not pipelined. Perform a resource$-$constrained scheduling using the mobility computed from the results of $1.$

Determine variable lifetimes and bind variables to as few registers as possible. $($Note: you don't need to consider connection cost.$)$