Consider the hypothetical processor with instruction format seen below: 0 34 15 Opcode Address In class, we saw an example that considered three instruction op-codes. For this question, we add two more for a total of five. They full set is as follows: 0001 = Load AC from memory 0011 = Load AC from 1/0 device 0010 = Store AC to memory 0111 = Store AC to 1/0 device 0101 = Add to AC from memory For the new op-codes 0011 and 0111, the address field in the instruction refers to some external 1/0 device. Show the execution for a program that does the following: 1. Load AC from device 5 (address 705). 2. Add contents of memory location 305. 3. Store AC to device 6 (address 706). In your answer, it is enough to show the contents of the registers at each step. The initial state of the CPU, in the same format we saw in class, can be seen below. You must fill in the memory and register values for this initial fetch stage and all remaining instruction cycles. PC Fetch stage: Memory CPU registers 300 300 301 0000 AC 302 IR 303 0000 304 0000 0003 Device 5 305 0002 0000 Device 6 Execute stage: Memory CPU registers 300 PC 301 302 IR 303 304 Device 5 305 Device 6 AC