Consider the internal structure of a pseudo-CPU discussed in class. Suppose the pseudo-CPU can be used to implement the hypothetical instructions given below Give the sequence of microoperations required to implement the Fetch and Execute cycle for each of the instructions shown below. Your solution should result in minimum number of microoperations. Assume PC is currently pointing to the instruction and only PC and AC have the capability to increment itself. (d) Jump to subroutine: JMS Y:M(Y) + PC, PC Y + 1 ALU AC TEMP Internal Data Bus IR PC MDR MAR CU Internal control signals To/from memory and VO devices External control signals