Question: Consider version 3 of the sequential multiplier described in class ( pictured below ) . Assume a 4 - bit version ( the diagram shows

Consider version 3 of the sequential multiplier described in class (pictured below). Assume a 4-bit version (the diagram shows a 32-bit version) of this is implemented that can handle signed 2s complement numbers using Booths algorithm. If the multiplier =-5 and the multiplicand =7. After two iterations, what is the value in the product register? Express the answer in binary.
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