Convert numbers given in one base to its equivalent numbers in a different base.

Translate word statement and$/$or Boolean function to equivalent truth table.

Derive$/$minimize SOP or POS form of logic functions.

Realize Boolean logic $($given in either minterm or maxterm form$)$ using NAND$-$only or NOR$-$only circuits.

Determine output$($s$)$ of combinational circuits that may include one or more of the following MSI's $-$ MUX, decoder, and adders.

Assemble full adders, multi$-$bit adders$/$subtracters$,$ half adders, and MUX to add$/$subtract multi$-$bit numbers.

Redesign given multi$-$level logic circuit to reduce either the number of logic gates or propagation delay or both.

Interpret behavior of a given sequential circuit $($Mealy or Moore$)$ either in terms of state diagram or PS$-$NS table.

Design synchronous sequential circuits $($including counters$)$ from given word statement.

Develop primitive flow table and, in turn, merged flow table from given word statement related to asynchronous sequential circuits.

Design combinational circuits using ROMs, PLAs, and PALs. Characterize memory size of the corresponding ROMs, PLAs, and PALS.Convert numbers given in one base to its equivalent numbers in a different base.

Translate word statement and$/$or Boolean function to equivalent truth table.

Derive$/$minimize SOP or POS form of logic functions.

Realize Boolean logic $($given in either minterm or maxterm form$)$ using NAND$-$only or NOR$-$only circuits.

Determine output$($s$)$ of combinational circuits that may include one or more of the following MSI's $-$ MUX, decoder, and adders.

Assemble full adders, multi$-$bit adders$/$subtracters$,$ half adders, and MUX to add$/$subtract multi$-$bit numbers.

Redesign given multi$-$level logic circuit to reduce either the number of logic gates or propagation delay or both.

Interpret behavior of a given sequential circuit $($Mealy or Moore$)$ either in terms of state diagram or PS$-$NS table.

Design synchronous sequential circuits $($including counters$)$ from given word statement.

Develop primitive flow table and, in turn, merged flow table from given word statement related to asynchronous sequential circuits.

Design combinational circuits using ROMs, PLAs, and PALs. Characterize memory size of the corresponding ROMs, PLAs, and PALS.