convert the code below to human readable format using defines for stm32f407vg discovery board. Supply the c file only. No other formats will be accepted. #define PERIPH_BASE 0x4000000OUL #define AHBIPERIPH_BASE (PERIPH_BASE + Ox00020000UL) #define RCC_BASE (AHBIPERIPH_BASE + 0x3800UL) #define RCC_AHBIENR *((unsigned volatile int *)(RCC_BASE+ 0x30) ) Address offset: 0x30 / // __IO uint32_t AHBIENR; /*!AHBIENR; //#define RCC_AHBIENR_GPIODEN_Pos (30) int main() {//rcc ahblenanble register, clock gating // ((unsigned volatile int *) 0x40023830)=0x08u; RCC_AHBIENR=0x08u; // set mod register of gpiod for pins... to output *((unsigned volatile int) 0x40020c00)=0x10000000u; // set the output data register of *((unsigned volatile int) 0x40020c14)=0x4000u; ://otyper *((unsigned volatile int) 0x40020c14)=0x0000u; *((unsigned volatile int *) 0x40020c14)=0x4000u; convert the code below to human readable format using defines for stm32f407vg discovery board. Supply the c file only. No other formats will be accepted. #define PERIPH_BASE 0x4000000OUL #define AHBIPERIPH_BASE (PERIPH_BASE + Ox00020000UL) #define RCC_BASE (AHBIPERIPH_BASE + 0x3800UL) #define RCC_AHBIENR *((unsigned volatile int *)(RCC_BASE+ 0x30) ) Address offset: 0x30 / // __IO uint32_t AHBIENR; /*!AHBIENR; //#define RCC_AHBIENR_GPIODEN_Pos (30) int main() {//rcc ahblenanble register, clock gating // ((unsigned volatile int *) 0x40023830)=0x08u; RCC_AHBIENR=0x08u; // set mod register of gpiod for pins... to output *((unsigned volatile int) 0x40020c00)=0x10000000u; // set the output data register of *((unsigned volatile int) 0x40020c14)=0x4000u; ://otyper *((unsigned volatile int) 0x40020c14)=0x0000u; *((unsigned volatile int *) 0x40020c14)=0x4000u