$)$ Create a Greatest Common Divisor circuit that accepts two N$-$bit values and computes the greatest common divisor between the two values. The circuit will follow Euclidean$$s algorithm. The Euclidean algorithm is based on the following key observation: if d divides a and d divides b$,$ then d also divides a $$ b$.$ This means that the GCD of a and b is the same as the GCD of a $$ b$,$ which is progress since this makes the numbers smaller. The values will be assumed to be unsigned binaries. The complex FSM for the circuit is below. Each of the internal registers is size $2$xN bits. a$)$ List the functions of the two registers and choose control signals and encodings for each function. Be efficient in your control signal encoding $($i$.$e$.,3$ functions need only $2$ bits$).$ Also, identify any status output signals needed for the registers and name them. $(12$ Points$)$