CS270-Spring 2018- HW4 Q1. Consider a memory with a 32 bit address, 128 bytes per block, and 2048 blocks in the cache. For direct mapped and 2-way set associative, for Part i, show the logical partitioning of the memory address into byte offset, cache index, and tag components. For Part ii, how any bits are needed to create this cache (Hint: Add up the valid, tag and data bits)? Name: (a) direct mapped cache i. Below are the three parts of the memory address. Populate the number of bits and label each section: byte offset, tag and index. ii. How many bits are needed to create this cache? (b) 2-way set associative cache i. Below are the three parts of the memory address. Populate the number of bits and label each section: byte offset, tag and index. ii. How many bits are needed to create this cache