CSC $305\mathrm{.}01($Spring $2024)$

HomeWork #$4$

$(\frac{04}{23}\frac{?}{2024})$

CPU

Objectives: $*$ CPU Data Paths

Pipelining

A$.$ The taks is to implement an instruction that does register swaps.

I.e$.$

swap $R_n,R_m$

Implement it $($in three different ways$)$ by a sequence of already defined LEGv$8$

instructions,

first, using a third register for temp storage

second, not using any additional registers, but by using the stack for temp

storage

third, by not using any addional register, nor memory. $($is this possible?$)$

B$.$ Consider the following loop.

LOOP: LDUR X$10,[$X$1,$ #$0]$

LDUR $x11,[x1,$#$8]$

ADD $x12,x10,x11$

SUBI $x1,x1,$#$16$

CBNZ X$12,$ LOOP

Show a pipeline execution diagram for the first two iterations of this loop.

Mark pipeline stages that do not perform useful work.

How often is the pipeline full? $($a cylcle in which all five pipeline stages are

doing useful work$)$

C$.$ Provide a $2-3$ pages typed report on your results and experience.

$($MUST$)$ Provide proof that you have implemented the Assembly code. $($text of your

code, screenshots, phone camera shots, no videos$)($include within the report$).$

$-($MUST$)$ Provide proof that you have run $($executed$)$ your swap code. $($screenshots

of your execution$)($include within the report$).$

$($MUST$)$ Provide proof that you have run $($executed$)$ your loop code. $($screenshots

of your pipelines$/$data paths$)($include within your report$).$