Question: CSC 3 6 2 Homework Assignment # 7 Due Date: Wednesday, April 2 4 Word Processor all answers, show work for partial credit. 1 )
CSC Homework Assignment #
Due Date: Wednesday, April
Word Processor all answers, show work for partial credit.
Architectures are considering one of two changes to their processor. The first is to increase
the L cache hit time from ns to ns per cycle. The processor operates while there are
no stalls in the pipeline. With this increase, they anticipate an average of stalls per
instruction. The second is to increase the TLBs size. Currently, the TLB has a miss rate of
but the increased size will change this to only When the TLB misses, the page
table in DRAM must be accessed. DRAM access is ns recall from above, the L cache,
which includes the TLB can be accessed in ns Use Amdahls Law to compute the
speedup of both options and state which should be implemented.
Answer the following questions about the forms of IO
a Assume an input task requires moving bytes from input to memory. Further,
assume that each transfer is byte at a time. Assume no errors occur.
i If this task was handled by programmed IO how many interrupts would take
place?
ii If this task was handled by interruptdriven IO how many interrupts would
take place?
iii. If this task was handled by DMA IO how many interrupts would take place?
iv If this task was handled by channel IO how many interrupts would take place?
b What additional hardware will a DMA controller have over an IO module that uses
interruptdriven IO
Use the figure on slide to answer the following questions.
a What are the DD lines used for?
b In our computers, we do not use these two lines, what do we use in place of them
and why?
c Why should the keyboard have a higher priority over the disk drive to interrupt the
CPU?
Assume we have six drives in a RAID configuration whereby a parity byte is stored using
five data bytes and stored on the sixth drive. We have the following values where the byte
on disk is inaccessible. What is this missing byte? restore it by using the other seven
bytes, assume even parity is used
Disk :
Disk :
Disk :
Disk :
Disk :
Parity:
Answer the following regarding RAID levels.
a How does RAID improve over RAID
b How does RAID improve over RAID
c RAID uses no redundancy so why would anyone select RAID at the added
expense of using RAID?
d Although RAID would provide a better performance over RAID RAID is
seldom used, why?
Answer the following questions regarding using a binary semaphore to implement
synchronization.
a Show how the wait and release functions are implemented.
b Why is the while loop in wait not an infinite loop?
c What would happen if we initialize the semaphore to instead of
d We implement wait and release using atomic instructions. What is an atomic
instruction and why should we use one to implement these functions?
Given the C program below, provide the runtime stack as it would appear at point P For
each variableparameter on the stack, list it as well as its current value. You will have to
work through the logic of the code to determine the order that functions are called.
void main
int x ;
foox;
void fooint a
int b ;
printfd
barab;
int barint z
ifz return barz;
else return dummy;
int dummy
int c ; P
return c;
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