Question: Depending on the need, MIPS uses three different approaches to generating full32-bit addresses for control-flow instructions. It uses PC-relative addressing for conditional branch instructions, pseudo-direct

Depending on the need, MIPS uses three different approaches to generating full32-bit addresses for control-flow instructions. It uses PC-relative addressing for conditional branch instructions, pseudo-direct addressing for unconditional J-type jump instructions, and register indirect addressing for unconditional jump register instructions. This question explores the design decision of which addressing mode should be used for a conditional branch.

a. Given the following branch, what is the largest and smallest 'label' can represent with PC-relative addressing(i.e. what MIPS actually uses for BEQ)? Show your work.

0x004FFFF0: beq $t0, $t1, label

b. Without changing the instruction format from the above branch, what would be the largest and smallest address that 'label' can represent with pseudo-direct addressing? Show your work.

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