Design a combinational logic circuit that has three inputs A, B, C and output F, G Output F condition: For input 2, 3, 5, 7 : F will be HIGH only when a majority of the inputs are LOW otherwise F will be LOW F will be INVALID for other inputs Output G condition: For input 0, 1, 4, 6: G will be HIGH only when a majority of the inputs are HIGH otherwise G will be LOW G will be LOW for other inputs a) Create the truth table for the combinational logic circuit. b) Get simplified SOP expression for F and G using KMAP minimization. c) Draw output circuit for F and G using 2 input basic gates only (AND, OR, NOT)