Design a combinational logic circuit using VHDL coding that executes the arithmetic and logic unit $($ALU$)$ functions below for the given inputs for registers A$,$ B and $G,$ which are $8$ bits each. $x$ is a binary input. Then execute the following mathematical operation:

$)7)5$

TABLE $8-2$

Function Table for ALU

$\backslash$table$[[$Operation Select,,,$],[s_2,s_1,s_0,C_{in},$Operation,Function$],[0,0,0,0,G=A,$Transfer $A$