design a computer system with an 8-bit address bus, an 8-bit data bus and it uses isolated I/O. It has:

(1)128 bytes of EPROM starting at address 00H (H meaning in hexadecimal) constructed using 644 chips;

(2) 64 bytes of RAM constructed using 168 chips;

(3) an input device with a READY signal at address ABH;

(4) an output device with a READY signal at address CDH;

(5) a bidirectional input/output device with no READY signal at address EFH.

Please design the computer organization for this system. (Choose an appropriate starting address for the RAM by yourself, and use a decoder to enable memory chips.) Include all enable and load logic. Note: For the complete design, points will be given by evaluating the following components:

(1)Memory chips and structure (25%);

(2)Memory chips decoder (25%);

(3)Input & output devices and their enable logic (25%);

(4)Data bus and other wire connections (25% in which 5% is for the width of the connection wire between all pairs of components).

Problem-Part (a): How many 644 memory chips do we need to construct the EPROM of 128 bytes? Show how you get it?

Problem-Part (b): How many 168 memory chips do we need to construct the RAM of 64 bytes? Show how you get it?

Problem-Part (c): Show the address range (i.e., the first address and the last address) for EACH of the EPROM chips?

Problem-Part (d): What starting address do you choose for the RAM?

Problem-Part (e): Based on your choice of starting address for the RAM in

Part (d): show the address range(i.e., the first address and the last address) for EACH of the RAM chips?

Problem-Part (f): What is size of the decoder you choose to enable the memory chips? Explain your choice.

Problem-Part (g): Show your COMPLETE design for this system.