Design a digital system with three $8-$bit registers R$0,$ R$1$ and R$2$ that performs the following sequence of operations $($where R$2$ is a loadable shift register$)$:

When the starting signal $G$ goes HIGH, transfer two signed numbers to R$0$ and R$1$ from two $8-$bit inputs of the system.

If $R1$ is negative $(msb=1),$ transfer $R0$ to $R2$ and shift right.

If $R1$ is positive $(msb=0$ and $R1$ is not zero$),$ transfer $R1$ to $R2$ and shift right.

If $R1$ is zero, reset the register $R2$ to zero.

Draw an ASM chart of the system's control unit. Design and draw the datapath structure of the system. Show all the control, status and data transfer signals. Implement the ASM chart developed above using any method of your choice.