Design a divisibility decoder.

The circuit should have $3$inputs $($x$,$y$,$z$)$and two outputs $($F$,$G$).$The inputs $($x$,$y$,$z$)$ should be the binary representations of decimal numbers from $0$ to $7($e$.$g$.5=(101)=>($x$=1,$y$=0,$ z$=1).$

F will be true if the input number is greater than $0$

G will be true if the input number is less than or equal to $5$

$$Draw the one corresponding circuit with three inputs and $2$ outputs in LOGISIM!