Question: Design a sequential circuit that takes a serial input: E and generates 1 as an output M when the 2 patterns occur as 2 last

Design a sequential circuit that takes a serial input: E and generates 1 as an output M when the 2 patterns occur as 2 last observed bits (non-overlapping). Example of the behavior: E : 011110000101 M:001010101000 Time : a) Code the machine in VHDL b) Create the state diagram

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