Design an arithmetic logic shift unit with $4$ bit operation code and $4$ bit data inputs A and B$.$

The circuit generates the following operations. Draw the logic diagram for all stages. $($Outputs:

$Q$ with $4$ bits, overflow, carryout.$)$Design a Serial Arithmetic Logic Unit $($ALU$)$ that performs a set of operations on up to two $4-$bit binary numbers based on

a $4-$bit operation code $($OpCode