Determine the addresses using the information provided:

Now suppose the system is equipped with a hardware-managed linear page table. The page table base register, containing the location in physical memory where the page table begins, is set to 8K. Each page table entry is one byte.

The four translations stored in the page table are

virtual page 0 --> physical page frame 5

virtual page 1 --> physical page frame 10

virtual page 2 --> physical page frame 15

virtual page 3 --> invalid

Recall that each memory accessfetch, load, or storerequires an a virtual address to be translated to a physical address. Therefore, in a system with no TLB, each memory access requires two physical address calculations: one for the page table entry and one for the operation itself.

Carry out the execution of the single load instruction

load r1, [1024]

The instruction is stored at virtual address 2048.

Determine the following addresses:

The physical address of the page table entry for the instruction location

The physical address of the instruction

The physical address of the page table entry for the data location

The physical address of the data