Develop a hypothetical architecture with illustrative instruction and data formats,

instruction sets, etc., explain the instruction and machine cycles step$-$by$-$step by

developing a short program $($at least, with four arithmetic operations $($two of which are register$-$based addressing$),$ three logic operations $($one of which is memory$-$based addressing$),$ and two I$/$O operations$)$ and by indicating the corresponding register operations. All architectural, organizational, etc., selections must to be justified sufficiently.