Question: Direct Memory Access is used for high-speed I/0 devices in order to avoid increasing processor execution load: (a) How does the processor interface with the

Direct Memory Access is used for high-speed I/0 devices in order

Direct Memory Access is used for high-speed I/0 devices in order to avoid increasing processor execution load: (a) How does the processor interface with the Direct Memory Access Controller (DMA Controller) to coordinate transfers? (b) How does the processor know when memory access is complete? (c) The processor is allowed to execute other programs while the DMA controller is transferring data. Does this process interfere with the execution of the user program? Why

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