Do the problems 2.1a-d, and 2.2 of the Case Study 1 of Chapter 2 on pp 148-150 and problems 2.18 a-d (needs the following CACII data), 2.20, 2.21, and 2.41 in the Exercise of Chapter 2.

CACII data sheet:

The following data and formula are from the CACTI (an integrated cache and memory access time, cycle time, area, leakage, and dynamic power model):

1. The cache access time of 64 KB caches with 64-byte blocks and a single bank:

Direct-mapped cache = 0.86 ns

2-way cache = 1.12 ns

4-way cache = 1.37 ns

8-way cache = 2.03 ns 2.

The access time of four-way set associate caches with 64-byte blocks and a single bank

16 KB cache = 1.27 ns

32 KB cache = 1.35 ns

64 KB cache = 1.37 ns

3. Miss% = misses per instruction/references per instruction:

Direct-mapped cache = 2.2%

2-way cache = 1.2%

4-way cache = 0.33%

8-way cache = 0.09%

Direct mapped access time = 0.86 ns @ 0.5 ns cycle time = 2 cycles

2-way set associative access time = 1.12 ns @ 0.5 ns cycle time = 3 cycles

4-way set associative access time = 1.37 ns @ 0.83 ns cycle time = 2 cycles

8-way set associative access time = 2.03 ns @ 0.79 ns cycle time = 3 cycles

4. Miss penalty

Direct-mapped cache = (10ns/0.5ns) = 20 cycles

2-way cache = 10ns/0.5ns = 20 cycles

4-way cache = 10ns/0.83ns = 13 cycles

8-way cache = 10ns/0.79ns = 13 cycles

5. Finally, Avg. access time = hit% x hit time + miss% x miss penalty

Direct mapped cache = (1-0.022) x 2+0.022 x 20 = 2.396 cycles => 2.396 x 0.5 = 1.2 ns

2-way mapped cache = (1-0.012) x 3+0.012 x 20 = 3.2 cycles => 3.2 x 0.5 = 1.6 ns

4-way mapped cache = (1-0.0033) x 2+0.0033x13=2.036 cycles => 2.036 x 0.83 = 1.69 ns

8-way mapped cache = (1-0.0009) x 3+0.0009x13=3 cycles=>3x0.79=2.37 ns

(Direct mapped cache is the best in this case.)

Specify which of the above data are used in your problem 2.18.