dont do part 3

Design and build a four-input/two-output system defined by the following: a.(bs,b2,bu,bo) = m 1,7,15 +D(3,12) aoby,b2,bu,bo) = m 1,3,4,5,6,14,15 +D(7,12) Implement this using only 2-input NAND gates (7400 chips) and INVERTER gates (7404 chips). For process, we suggest you minimize using a Karnaugh map for each, then factor to meet fan- in requirement of 2 then convert to a NAND and INVERTER only circuit. The reference solution fits in 8 gates (2x7400 chips) plus 5 Inverters (1x 7404 chip). You should be able to get the design into 4 chips including the inverter (and you might find an even better solution than the reference). Finally, be very methodical with your design and during construction, otherwise you might spend hours troubleshooting. Part 3: Systems Integration Now connect the two systems together, insure that it functions correctly, and then have course staff check off your work. You will only need to use A,B as inputs to the 7447 (C and D are tied to 0 - since we only have 2 bits we are worrying about). Insure proper operation and when completed have the course staff check off on your design