$$ Each counter in this exercise must be demonstrated with Multisim. Use only the components we have used on previous experiments.

$$ You must provide a complete design of each counter including all transition tables and Karnaugh Maps.

Part I

$1.$ Design a counter that will count $3,9,6,12,1,14$ and automatically reset to $3.$

$2.$ Design a counter that will count $0,2,3,7,10,13,15$ and automatically reset to $0.$

Part II

$1.$ Design a counter that will count $0,2,4,8,1,3,6,7,10,13,15,$ and automatically reset to $0.$

$2.$ Use NAND logic for this design $($ie$,$ you may only use NAND gates and flip$-$flops$).$

$3.$ You must use the TTL $7400\_$IC to do this. You may need more than one.

$4.$ You must use minimal circuit design. $($ie$,$ you must use fewest possible gates and use fewest possible chips.$)$

WARNING: do not use Multisim Logic Converter to get the NAND logic.

Use the picture as a example of what components are use able. Use the basic components.