Question: EE 4243 Computer Organization and Architecture Bonus Homework for Question 1 of 3 Due on 4/27/2017 For the following single-cycle processor, fill the table of

EE 4243 Computer Organization and Architecture

Bonus Homework for Question 1 of 3

Due on 4/27/2017

For the following single-cycle processor, fill the table of signal values for each instruction below. The values of registers and memory are given in the table below. You may leave a cell blank if it is not used for the given instruction. Instruction and register encoding is given below.

Register

Value

0 ($0)

0x00000000

8 ($t0)

0x00000000

9 ($t1)

0x12345678

10 ($t2)

0x00080000

11 ($t3)

0x00000000

0x00000000

16 ($s0)

0x0000FFFF

17 ($s1)

0xFFFF0000

18 ($s2)

0x00000000

$pc

0x00001000

Memory address

Value

0x00001000

0x01309024

0x00001004

0x214B0004

0x00080000

0x0000000A

0x00080004

0x000000BB

0x00080008

0x00000CCC

Instruction encoding

Mnemonic

OP code

Function code

Type

and

0x00

0x24 (1001002)

R

or

0x00

0x25 (1001012)

R

lw

0x23

N/A

I

addi

0x08

N/A

I

Register encoding

Register name

Register number

$0

0

0x00

$at

1

0x01

$v0-$v1

2-3

0x02-0x03

$a0-$a3

4-7

0x04-0x07

$t0-$t7

8-15

0x08-0x0F

$s0-$s7

16-23

0x10-0x17

$t8-$t9

24-25

0x18-0x19

$k0-$k1

26-27

0x1A-0x1B

$gp

28

0x1C

$sp

29

0x1D

$fp

30

0x1E

$ra

31

0x1F

Signal

(a)

(b)

PC

0x00001000

0x00001004

RD of Instruction Memory

A1 of Register File

A2 of Register File

A3 of Register File

SrcA of ALU

SignImm

SrcB of ALU

ALUResult

ReadData

WriteData

Result

PCBranch

MemtoReg

MemWrite

Branch

ALUSrc

RegDst

RegWrite

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