EENG HELP PLEASE DO NOT COPY RESPONSE FROM OTHER POSTED PROBLEMS THEY ARE INCORRECT

Problem 5: Interrupts [25 Points] a. Provide steps needed to enable interrupts, both external and internal| b. Provide instructions you would use to disable interrupts, both internal and external. c. For TM4C123GH6PM, if interrupts are disabled does it mean that the CPU will not recognize them at all, or would they be queued as pending interrupts? d. Do software interrupts have mask bits i.e. do they need to be disabled and enabled by setting registers of the NVIC appropriately? e. Nesting interrupt is normally not advisable because of the potential indeterminate nature of nesting interrupts. The TM4C123GH6PM is however designed to accommodate interrupt nesting. Please identify the design factors that mitigate the potential indeterminism caused by nesting, f. If you are using SysTick interrupts, how would you set the priority to level 6 ? (Problem 9.1 pp. 374 of textbook) g. If you are using Timer0 A interrupts how would you set priority to level 5? (Problem 9.2 pp. 374 textbook)