Efficient Row Buffer (RB) for 2-Dimensional Filters: In conventional BRAM-based RB implementations, each BRAM is used in the first in first out (FIFO) configuration to implement the functionality of one RB (i.e. to store one image row). This approach costs (K1) BRAMs to implement (K1) RBs for a KxK filter for image processing. The major drawback of this approach is that each BRAM remains partially utilized to store just one image row. In order to improve the BRAM space utilization and thus, reduce the implementation cost of RB, different efficient architectures are proposed by researchers. Design Requirement: You are required to read the research paper given on efficient RBs implementation using BRAM. Use a similar approach to implement 18RBs for a 4K image resolution consuming single Ultra RAM. Critically evaluate the performance of your design in terms of its power consumption, space utilization, and operating frequency. Deliverables: - Implement the digital system on an Ultra scale+ FPGA device. - Submit the assignment report that covers relevant theory, methodology, code, implementation results and device utilization summary