Exercise $2$

$($W$/$L$)$p $=40$ and $($W$/$L$)$n $=10$

VTn $=0\mathrm{.}53$ V

$$ VTp $=0\mathrm{.}51$ V

$$ nCox $=98\mathrm{.}2$ A$/$V$2$

$$pCox $=46$ A$/$V$2$

$$ VDD $=1\mathrm{.}2$ V

$$ Ec$,$nLn $=0\mathrm{.}45$

$$ Ec$,$pLp $=1\mathrm{.}2$

$$ Y $=($A$$B$)+($C$$D$)+($B$$E$)$

$$

a$)$ Draw the CMOS transistor$-$level of the complex logic gate.

b$)$ Compute the $($W$/$L$)$n and $($W$/$L$)$p of the equivalent inverter.

c$)$ Draw the pseudo$-$nMOS transistor$-$level of the complex logic gate.

d$)$ Compute the worst$-$case VOL of the equivalent inverter.