Exercise $3$

$1-$ Is the CPU cortex MO$+$ Von Neuman or Harvard architecture? Justify your answer and provide refence $($datasheet link, with page number$)$ supporting your answer.

$2-$ The memory of the KL$25$ Microcontroller is shown in the Figure below. Deduce the design of the interface circuit between the CPU $($Cortex $MO+)$ and each of the memories shows in the picture $($e$.$g$.$ provide the equation of OutputEnable $($OE$),$ connected to each of these memories$).$ Remember that the CPU Cortex M$0+$ has $32$ bits address $($A$[31$:$0])$ and $32$ bits data $($D$[31$:$0)).$

$---$Solve it by hand please$----$