Question: Exercise 4 Suppose the target assembly language for a compiler has these tive instructions for integers: load address, reg add reg, reg, reg sub rex,

 Exercise 4 Suppose the target assembly language for a compiler has
these tive instructions for integers: load address, reg add reg, reg, reg

Exercise 4 Suppose the target assembly language for a compiler has these tive instructions for integers: load address, reg add reg, reg, reg sub rex, reg,reg mul reg, reg, reg store rg, address In these instructions, an address is the name of a static variable (whose actual address will be filled in by the loader). A reg is the name of an integer register a special extra-fast memory location inside the processor. The target assembly language has three integer registers: r1, r2, and r3. The load instruction loads the integer from the given memory address into the given register. The add instruc- tion adds the second register to the first register and places the result in the third register. The sub instruction subtracts the second register from the first register and places the result in the third register. The mul instruction multiplies the first register by the second register and places the result in the third register. The store instruction stores the integer from the given register at the given memory ad dress. So, for example, the compiler might translate the assignment result offset+ (width n) into this: load width, rl load n, r2 mul rl,r2,rl load offset, r2 add r2,rl,rl store rl,result Chapter 4 Language System this assembly language, give translations of the following ass ments Use as few instructions as possible a netgross-costs volumeength widthheight dfinala abase) b-bbase))le is an esample of a load/store anchitecture. Many modern microprocessors This implement an architecture like this, though usually with more registers) ba darmet assembly language for a compiler has these five

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